1. Field of the Invention
The present invention relates to a communication system having a reduced delay time, and more particularly, to a communication system having a reduced delay time that can provide an accurate delay time of a communication signal using a short delay line and that can accurately judge data bits of the communication signal in a receiver.
2. Description of the Related Art
Generally, a spread spectrum communication is a system for spreading a signal to be transmitted so that the signal has a much wider bandwidth than the original signal and transmitting the spread signal, and a system for transmitting information using a chaotic signal has been recently proposed, in accordance with the IEEE 802.15.4a standard.
The chaotic signal modulation system can be designed by a simple hardwired radio frequency (RF) structure, and does not require a circuit such as a voltage controlled oscillator (VCO), phase locked loop (PLL), mixer, and so on, which are required in existing RF systems. In the case of using the chaotic signal modulation system, the power consumption can be reduced to ⅓ of the power consumption of the conventional system, for example, to 5 mW.
A differential chaos shift keying (DCSK) system may be a representatively used modulation system among various chaotic signal modulation systems.
The DCSK system has the best bit error rate (BER) characteristic among the chaotic signal modulation systems. In the DCSK system that uses a reference signal, two chaotic sample parts that correspond to one data bit are transmitted for each symbol period. The first sample part is used as the reference signal, and the second sample part is used as a data signal to be transmitted. The second sample part is generated by transmitting the reference signal as it is or an inverted reference signal depending on whether a binary symbol being transmitted is “0” or “1”. That is, if the binary symbol is “0”, the second sample part, which is the data signal, is generated by inverting the reference signal, while if the binary symbol is “1”, the data signal is generated by transmitting the reference signal as it is. In a receiver side, the data bits are extracted by processing correlation between the two received sample parts.
FIG. 1 is a block diagram illustrating the construction of a conventional DCSK type communication system. As illustrated in FIG. 1, the communication system includes a transmitter 10 and a receiver 20.
The transmitter 10 includes a chaotic signal generator 11, a multiplier 13, a delay unit 15, and a switch 17. The transmitter 10 carries data on a chaotic signal which is transmitted to the receiver 20.
The chaotic signal generator 11 generates the chaotic signal directly from a frequency band for a data transmission.
The multiplier 13 receives the data bits of “0” or “1” for generating the data, multiplies the data bits by the chaotic signal generated by the chaotic signal generator 11, and provides the result of multiplication to the delay unit 15. If the data bit is “0”, the chaotic signal is inverted, and if the data bit is “1”, the chaotic signal is maintained as it is.
The delay unit 15 generates a data signal, which is included in the latter half of a symbol period, by delaying the output signal of the multiplier 13 by a half symbol period.
The switch 17 includes a first contact connected to the chaotic signal generator 11 and a second contact connected to the delay unit 15, and generates a signal to be transmitted to the receiver 20 by selecting one of the output signals of the chaotic signal generator 11 and the delay unit 15. The switch 17 alternately switches the first and second contacts under the control of a control unit (not illustrated), and a contact time is set to ½ of a symbol period Ts.
For example, if the switch 17 is switched to the first contact for ½Ts, the reference signal from the chaotic signal generator 11 is output through the switch. Then, if the switch 17 is switched to the second contact, the data signal from the delay unit 15 is output through the switch 17.
By this switch 17, communication signals as shown in FIGS. 2A and 2B are generated. FIG. 2A illustrates a communication signal in the case where the reference signal is the same as the data signal, i.e., the data bit is “1”, and FIG. 2B illustrates a communication signal in the case where the data signal is the inverted reference signal, i.e., the data bit is “0”.
On the other hand, the receiver 20 includes a delay unit 25, a multiplier 23, a waveform generator 27, and a data judgment unit 29.
The delay unit 25 delays the communication signal input through an antenna as long as the delay time delayed by the delay unit 15 of the transmitter 10, i.e., for ½Ts. This is to judge the data bits by comparing the data signal with the reference signal.
The multiplier 23 multiplies the communication signal input through the antenna by a signal delayed through the delay unit 25, and provides the resultant signal to the waveform generator 27. If the reference signal and the data signal are equal to each other, i.e., if the data bit is “1”, a communication signal having twice the energy is output. If the reference signal and the data signal are opposite to each other, i.e., if the data bit is “0”, a communication signal having twice the negative energy is output.
The waveform generator 27 removes the chaotic signal and forms the waveform of the communication signal by adding the communication signals output from the multiplier 23 for a predetermined period, i.e., for each symbol period.
The data judgment unit 29 receives the waveform generated by the waveform generator 27, and extracts the data bits from the input waveform. The data judgment unit 29 judges the data bits depending on whether the waveform is higher that a predetermined threshold value, which is set to the energy value of “0”. If the waveform is higher than the threshold value, the data judgment unit 29 judges the data bit as “1”.I If the waveform is not higher than the threshold value, the data judgment unit 29 judges the data bit as “0”.
In order to generate the data signal in the conventional DCSK type communication system, a long delay line for delaying the signal as long as ½Ts should be provided. In addition, it is not easy to accurately perform a delay as long as ½Ts. In the case of comparing the received signal with the delayed signal after the communication signal is delayed as long as ½Ts in the delay unit 25 of the receiver 20, only one comparison is possible for a symbol period since one reference signal and one data signal exist in a symbol period. Accordingly, if a multi-path reception of a noise or a communication signal occurs, the waveform output from the waveform generator 27 has an energy value that is lower than the threshold value although the signal output from the transmitter 10 is “1”, and this may cause the data bit to be judged as “0”. By contrast, if the waveform output from the waveform generator 27 has an energy value that is higher than the threshold value although the signal output from the transmitter 10 is “0”, the data bit may be judged as “1”.
Accordingly, a method is needed for not only providing an accurate delay time of the communication signal through the delay unit 15 but also shortening the delay line. In addition, it is required to provide a method for more accurately judging the data bits for each symbol period in the receiver side.